| 128-byte deep FIFO per transmitter and receiver |
| Automated in-band software flow control using programmable Xon/Xoff in both directions |
| Automated out-of-band flow control using CTS/RTS and DSR/DTR |
| Compliant with PCI Express base specifications revision 1.1a |
| Native single-chip, single lane PCI Express |
| One high speed RS232 serial port with data transfer rate up to 460.8 Kbps |
| Selectable power output on pin 9 for the serial port |
| Ships with half-height/low profile mounting bracket, includes optional standard profile bracket |
| Single chip design optimizes speed and reliability |